CINDATEC develops, manufactures and distributes state-of-the-art applications using computer hard- and software for industry sectors like aircraft/spacecraft, medical equipment, engineering services etc. The company was founded in 1991 and in 1998 had 8 employees, 6 of them involved in hardware and software design.
One of CINDATEC‘s main products is a transputer-based fault-tolerant computer used for applications with high data security requirements. The technical basis of this fault-tolerant system consists of a redundant hardware and an implemented specific system software. Because of market requirements the existing product had to be improved. Characteristic features of the new system are a better fault tolerance and data security reached by the introduction of the new Error Detection And Correction unit (EDAC), the flexibility for different interfaces and a more cost effective solution.
The main objective of the project is an increase of turnover in this product area, but also additional market shares by selling the FPGA based EDAC component itself. In order to achieve this, CINDATEC introduced FPGA technology and VHDL into the company’s business. The staff involved in the AE were trained in system-oriented design and simulation, its synthesis and the implementation of the designed system into Field Programmable Gate Arrays (FPGA). The use of this technology is optimal for the project and offers high flexibility, short development and market introduction periods and the advantages of a customer-specific ASIC solution also for a small number of pieces.
After first training activities, a very practical-oriented "Learning-by-doing”methodology was chosen. For the development process, the V-system supporting VHDL was used. The simulated design was implemented in a XILINX FPGA XC4013. The introduction of these technologies allowed the combination of fault-tolerant systems with error detecting and correcting components.
CINDATECs specialists acquired knowledge in the management of development projects using microelectronics technologies, in the field of digital VHDL based system design and its implementation in FPGAs. They are now able to replicate this in future developments.
The manufacturing costs have been reduced by 60%, which is a main driver to improving the competitive situation of CINDATEC’s EDAC. Furthermore, the component itself can be sold now separately, thus opening up a new market.
The project had a duration of 11 months, a break of two months included as opposed to the 9 months planned. The cost of the AE was 56 kECU, as planned. In addition a further 150 to 200K ECU was spent on productionising the EDAC, and will take around 1 year. The payback period is expected to be in the range of 12-18 months, and the ROI between 200 and 300% assuming a 3 year product life cycle.
A number of lessons were learnt during the AE. These included ensuring that the market for the product is monitored during the development phase. In this AE the FPGA solution will be modified to make it compatible with the PC.
